• Master CV

DeTao Master of Electrical and Computer Engineering

  • Name:Israel Koren
  • Nationality:American
  • Area:Electrical and Computer Engineering
CV:

Prof. Israel Koren is a professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst and was honoured as a Fellow of the IEEE “For contributions to the field of fault-tolerant VLSI systems.” in 1991. He has been a consultant to numerous companies including Analog Devices, AMD, IBM, Intel and National Semiconductor.

Prof. Koren's current research interests are Fault-Tolerant Systems, VLSI Yield and Reliability, Secure Cryptographic Systems, and Computer architecture and Arithmetic. He has published over 250 publications in refereed journals and conferences, and authored two textbooks. He served as General Chair, Program Chair and Program Committee member for numerous conferences.

 

Work Experience:

   1986 – Present  Professor, Department of Electrical and Computer Engineering, University of Massachusetts at Amherst.

   1985 – 1986  Head, VLSI Systems Research Center, Technion, Haifa, Israel.

   1982 – 1983  Visiting Professor, Computer Science Division, University of California at Berkeley.

   1979 – 1986  Senior Lecturer, Electrical Engineering, Technion, Haifa, Israel.

   1978 – 1979  Assistant Professor, Dept. of Electrical Engineering–Systems, University of Southern California, Los Angeles.

   1976 – 1978  Assistant Professor, Department of Electrical and Computer Engineering, University of California, Santa Barbara.

 

Professional Activities:

   Keynote Address, “Yield Modeling: Theory and Practice,” 2012 IEEE Intern. Symp. on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, Oct. 2012.

   Guest Editor (with D. Mosse) of a Special Issue of the Sustainable Computing: Infor-matics and Systems Journalon the IEEE Green Computing Conference (IGCC 2011), July 2012.

   Co-Program Chair, IGCC 2011 - International Green Computing Conference.

   Associate editor of Sustainable Computing: Informatics and Systems, since 2010.

   Associate editor of VLSI Design Journal, since 2006.

   Associate editor of IEEE Computer Architecture Letters, 2006-2010.

   Associate editor of IEEE Trans. on VLSI Systems, 2001-2006.

   Guest Editor (with L. Breveglieri) of a Special Issue of the IEEE Trans. on Computers on Fault Diagnosis and Tolerance in Cryptography, Sept. 2006.

   Editorial Board member - book series “Sustainable Energy Developments,” CRC Press.

   Steering Committee member - IGCC - International Green Computing Conference.

 

Honors and Awards:

   1995 Best Paper Award, IEEE Transactions on Semiconductor Manufacturing

   1991 Fellow, IEEE, For contributions to the field of fault-tolerant VLSI systems

   1991 Fellow, Japan Society for Promotion of Science

 

Patents:

   US Patent 7,408,578: Active pixel with built in self-repair and redundancy, Aug. 2008.

   US Patent 7,278,136: Reducing processor energy consumption using compile-time information, Oct. 2007.

   US Patent 6,934,865: Controlling a processor resource based on a compile-time prediction of number of instructions-per-cycle that will be executed across plural cycles by the processor, Aug. 2005.

Publications:

   G. Chapman, R. Thomas, Z. Koren and I. Koren, “Empirical Formula for Rates of Hot Pixel Defects based on Pixel Size, Sensor Area, and ISO," Proc. of the 25th SPIE Electronic Imaging Symp., Vol. 8659, pp. C1-C11, Feb. 2013.

   R. Rodrigues, A. Annamalai, I. Koren and S. Kundu, ”Improving Performance per Watt of Asymmetric Multicore Processors via Online Program Phase Classification and Adaptive Core Morphing," ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 18, pp. 1-23, Jan. 2013.

   A. Barenghi, L. Breveglieri, I. Koren and D. Naccache, “Fault Injection Attacks on Cryptographic Devices: Theory, Practice and Countermeasures," Proceedings of the IEEE, pp. 3056-3076, Nov. 2012.

   S. Wimer and I. Koren, “The Optimal Fan-Out of Clock Network for Power Minimization by Adaptive Gating," IEEE Trans. on VLSI Systems, pp. 1772-1780, Oct. 2012.

   F. Regazzoni, L. Breveglieri, P. Ienne and I. Koren, “Interaction between Fault At-tack Countermeasures and the Resistance against Power Analysis Attacks,” in Fault Analysis in Cryptography, M. Joye and M. Tunstall (Eds.), Chapter 15, pp. 257-273, Information Security & Cryptography, Vol. XVI, Springer 2012.

   A. Annamalai, R. Rodrigues, I. Koren, S. Kundu and O. Khan,” Performance per Watt Benefits of Dynamic Core Morphing in Asymmetric Multicores," Proc. of the 2011 Conf. on Parallel Architectures and Compilation Techniques (PACT'11), pp. 121-130, Oct. 2011.

   I. Koren and C. M. Krishna, “Temperature-Aware Computing," (Invited Paper), Sustainable Computing: Informatics and Systems, Vol. 1, pp. 46-56, Mar. 2011.

   H. Wang, I. Koren and C.M. Krishna, “Utilization-Based Resource Partitioning for Power-Performance Efficiency in SMT Processors," IEEE Trans. on Parallel and Distributed Systems, pp. 1150-1163, July 2011.

   Textbook: Fault Tolerant Systems, I. Koren and C. M. Krishna, Morgan-Kaufman Publishers, March 2007.

   Textbook: Computer Arithmetic Algorithms, 2nd edition, A K Peters, MA, 2002.

 

Education:

   D.Sc. Electrical Engineering, Technion - Israel Institute of Technology, Haifa, 1975

   M.Sc. Electrical Engineering, Technion - Israel Institute of Technology, Haifa, 1970

   B. Sc. Electrical Engineering, Technion - Israel Institute of Technology, Haifa, 1967